Newsgroups: comp.sys.transputer
From: Randy Brumbaugh <rando@mail.utexas.edu>
Subject: Re: sneaky suspicion wanted
Organization: The University of Texas at Austin, Austin, Texas
Date: 19 Dec 1994 00:06:00 GMT
Message-ID: <3d2ip8$5ph@geraldo.cc.utexas.edu>

In article <D0pn6C.LFA@info.swan.ac.uk> Lothar Berger, eeberger@faith
writes:
>I wanted to measure the time for a 'ldc' machine code on a T800 with
>Parallel-C.

This may help - I!ve had to do some _very_ accurate timing studies of
execution speeds in T800 code, and noticed some of the same things. (I
was wrtiing a software UART and had to sample the incoming signal levels
fast and evenly).

1.  Since the timer instructions complicate things, I used the SETERR and
TESTERR instructions to toggle the Error line, and used an oscilloscope
for timing measurements.  This is a pretty easy way to instrument code,
and I needed resolution better than 1 microsec.  Although the LS C
compiler talks about the Error line, I have never seen it set by compiler
generated code during a timing test.

2.  Disable DRAM refresh.  I was using all static RAM.  It was impossible
to use a loop to get evenly spaced samples with the DRAM refresh running
-- it would steal the bus every so often and do its thing. and introduce
unacceptable jitter in the samples.  Unfortunately there is no !prewired!
way to do this - a custom config is needed, which meant pre-loading it
into RAM/EPROM.  If you can!t fit your code into on-chip or other static
RAM, timing will vary.

Randy Brumbaugh
rando@mail.utexas.edu

