Newsgroups: comp.compilers,comp.parallel
From: weems@cs.umass.edu (Chip Weems)
Subject: CALL FOR PAPERS PACT '96
Keywords: conference, CFP, architecture, parallel
Organization: Univ. of Mass.
Date: Fri, 29 Sep 1995 15:58:57 GMT
Message-ID: <95-10-031@comp.compilers>

CALL FOR PAPERS

FOURTH INTERNATIONAL CONFERENCE ON PARALLEL
ARCHITECTURES AND COMPILATION TECHNIQUES

PACT '96

October 21 - 23, Boston, Massachusetts, USA

CONFERENCE OBJECTIVES

Current and future generation computer systems are aggressively
pursuing additional opportunities for boosting performance via
parallelism. Facing the challenge of exploiting such parallelism, a
simple "instruction set" as a binding contract between architects
and compiler writers may no longer be enough. This is the fourth in
the PACT series of successful conferences, previously held in
Orlando, Montreal and Limassol (Cyprus). The purpose of this
working conference is to provide an open forum for the parallel
architecture and compiler research communities to discuss and
debate key issues of common interest and see how parallelism can
be enhanced and exploited more efficiently in a joint effort. Also,
we aim at bringing together researchers with interest in both
conventional and non-conventional approaches (e.g., data-flow,
multi-threading, etc.) to foster communication. Papers are solicited
which contain significant novel ideas and research results.

CONFERENCE TOPICS INCLUDE (but are not limited to):

        Novel computation models for fine and medium grain
        parallelism;

        Architectures and compilers for fine and medium grain
        parallelism;

        Compiler / hardware techniques for exploitation of fine-grain
        parallelism in massively parallel machines;

        Support for medium-grain parallelism via low-latency
        processor interconnection networks;

        New programming languages and paradigms for fine and
        medium grain parallelism;

        Insights into compilation techniques or architectural
        mechanisms via application studies;

        Exploitation of fine and medium grain parallelism in
        application-specific architectures using data-flow, multi-
        threaded and other novel approaches.

INFORMATION FOR AUTHORS

All-electronic submission and review procedures for PostScript files,
using the World-Wide Web are being prepared.  Details and
instructions for paper submission can be obtained, after October 1,
1995, by e-mailing a request to pact96@cs.colostate.edu

News about the conference as well as the call for papers will be
available at http://www.cs.umass.edu/~pact96

Authors will be notified of a final decision by June 17, 1996. All
accepted papers will appear in the conference proceedings,
provided the author(s) commits to present the paper at the
conference.

IMPORTANT DATES

        Submission deadline:        March   8, 1996
        Acceptance notification:          June    17, 1996

GENERAL CHAIR

        Israel Koren, University of Massachusetts

FINANCE AND LOCAL ARRANGEMENTS CO-CHAIR

        Arnold Rosenberg, University of Massachusetts

PUBLICITY CHAIR AND LOCAL ARRANGEMENTS CO-CHAIR

        Charles Weems, University of Massachusetts

PUBLICATIONS CHAIR AND FINANCE CO-CHAIR

        C. Mani Krishna, University of Massachusetts

TUTORIALS CHAIR

        Ilan Spillinger, Intel Israel

PROGRAM COMMITTEE CO-CHAIRS

        Walid Najjar, Colorado State University
        Gabriel Silberman, IBM T.J. Watson Research

PROGRAM COMMITTEE TO INCLUDE

S. Abraham, H-P Laboratories, Palo Alto
V. Allan, Utah State University
L. Bic, University of California, Irvine
W. Bohm, Colorado State University
L. Carter, University of California, San Diego
M. Cosnard, Ecole Normale Superieure, Lyons
J. Dennis, Massachusetts Inst. of Technology
K. Ebcioglu,IBM T.J. Watson Research Center
G. Egan, Monash University, Australia
C. Eisenbeis, INRIA, France
P. Evripidou, University of Cyprus
J. Feo, Lawrence Livermore National Lab.
J. Ferrante, Univ. of California, San Diego
G. Gao, McGill University, Canada
J-L. Gaudiot, University of Southern California
J. Ghosh, University of Texas, Austin
R. Gupta, University of Pittsburgh
H. Hum, Concordia University, Canada
V. Malyshkin, Russian Academy of Sciences
K. McKinley, University of Massachusetts
A. Mendelson, Technion, Israel
R. Mraz, IBM T.J. Watson Research Center
A. Nicolau, University of California, Irvine
Y. Patt, University of Michigan
C. Polychronopoulos, Univ. of Illinois, UC
M. Rodeh, IBM Haifa Research Lab, Israel
S. Sakai, ETL & RWCP, Japan
Z. Segall, University of Oregon
J. Shen, Carnegie Mellon University, Pittsburgh
B. Shirazi, University of Texas, Arlington
M.L. Soffa, University of Pittsburgh
T. Sterling, USRA CESDIS
U. Weiser, Intel Israel
A. Wendelborn, Adelaide University, Australia

To be sponsored by IFIP WG 10.3 (Concurrent Systems), ACM
SIGARCH, and IEEE TC on Computer Architecture.

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