Newsgroups: comp.parallel
From: Susan Raskin <sraskin@fido.asd.sgi.com>
Subject: I/O and Shared Memory Performance Simulation MTS Position at Silicon Graphics
Organization: Silicon Graphics Inc., Mountain View, CA
Date: 21 Sep 1995 18:03:40 GMT
Message-ID: <43s9ds$qrj@usenet.srv.cis.pitt.edu>

Silicon Graphics has a new open position in its Mountain View 
headquarters for a Member of the Technical Staff. This MTS
will define the functionality and performance of a next-generation
shared memory multiprocessor and write high-level simulations of 
performance using performance simulation tools and C. Will 
develop and maintain specifications and participate in all phases
of the development effort. In addition, will define and lead
the design verification effort for this system. 

This position requires a PhDEE or equivalent experience, with
8 or more years experience in multiprocessor system design, 
CPU architecture, and a solid understanding of I/O issues which
affect performance. Knowledge of queuing theory and system 
modeling techniques is required; experience with design verification
in a Verilog environment is desired. 

To apply for this position, email resume to sraskin@sgi.com, 
fax to 415-933-0980, or call Susan Raskin at 415-390-4523. 
Silicon Graphics is an equal opportunity employer. Principals
only, please.

