Newsgroups: comp.parallel
From: rcarter@best.com (Russell Carter)
Subject: Re: "Pizza box" computers
Organization: Best Internet Communications, Inc. (info@best.com)
Date: 7 Sep 1995 19:35:12 GMT
Message-ID: <42nhhg$ph9@usenet.srv.cis.pitt.edu>

In article <42hnkl$7h7@usenet.srv.cis.pitt.edu>,
David D Golombek  <daveg@athena.mit.edu> wrote:
>In article <4026po$rgh@nova.umuc.edu>,
>4011 Student 18 <cm325a18@nova.umuc.edu> wrote:
>>>
>>>I believe I know what you are referring to-
>>>
>>>_Information Week_, 6/5/95, p. 100: "Massive Desktop Power."
>>>
>>>This article describes the Desktop RealTime Engine rolled out on May 15 by 
>>>Integrated Computing Engines of Cambridge, Mass., a MIT spinoff company.
>>>
>>>It is a "briefcase-sized machine" containing 32 33-MHz or 64 40-MHz Super 
>>>Harvard Architecture Computer ("Sharc") chips (Analog Devices ADSP-21060). 
>>>The two versions are $50K and $99.5K respectively. The article quotes a cost
>>>of $11.60/Mflop. The device communicates at 80 Mbps with an EISA PC front end
>>
>>This price is ridiculous.  O(1) KFLOPS/$ is the best you can do, I'm sorry
>>that your benchmarks lead you astray, perhaps memory bandwidth wasn't 
>>considered?  Try $300/Mflop for an excellent goal.  Prove me wrong!
>
>Ok, well I'll give it a shot :-)
>After reading about the company in EE Times, I checked out their web site
>(http://www.iced.com/) because their claims interested me. I then talked
>to Analog Devices' Information Center (617) 461-3392 and got the following
>information. According to the info, with the ADSP-21060, ICE may be able to  
>meet it's claims.  From what Analog is releasing, the chip is available at 33
>and 40 MHz for now.  Given that the chip transmits both a 48 bit instruction
>packet and two 40 bit data packets each clock cycle, it has a bandwidth of 640
>MBytes/sec.  Now, that's under optimal conditions with no blocking of course,
>who knows how it does in Real Conditions (tm).  The 48 bit instruction 
>packet can contain up to 3 separate instructions, leading to a peak instruction
>rate of 120 MFLOPS.  ICE is probably getting the 7.68 GFLOPS mark by putting
>64 of them in an array, and making sure they aren't doing redundant 
>calculations nor spending too much time communicating between chips.  As
>for price/perfomance, Analog sells the 40 MHz 21060 for $422 in quantities
>of 1000, so ICE can reasonably expect to meet the $11.60/MFLOP

"Real Conditions (tm)" includes a memory subsystem.  There is no
mention of that here.  Memory subsystems that can sustain 640 MBytes/s
are not cheap.  

>
>Overall, from what I've seen, the computer (or "RealTime Engine" as ICE calls
>it) should be quite impressive, if they can get the chips to come anywhere 
>close to their peak performance numbers.  They'll be releasing their first 
>products rsn, so we'll see then.

I don't dispute the potential for the chip performance.  What is inaccurate
is the $/(delivered MFLOP) of a system with a reasonable amount of memory.

Back of the envelope calculation:

$422/120MFLOP = $3.5/MFLOP.
$11.6/MFLOP - $3.5/MFLOP = $8.1/MFLOP available for memory.

Fraction of cost available for memory = 8.1/11.6 = 0.70
A simple proportion gives $982 available for memory/cpu

Assume DRAM, so we don't have to cool the thing. (cooling==$$)

That's about 32 MB of 60 ns DRAM with maybe 100 MByte/s bandwidth.
Nearly all systems built today when coupled to that kind of
memory sustain less than 15 MFLOP, unless what they are running
stays completely in cache.  In that case, we don't need memory...

Total node cost: $422 + $982 = $1404.

$1404/15 MFLOP = $93/MFLOP absolute best possible.  That's pretty good,
but a long way off from $11/MFLOP.  I've left a lot of costs out as well.

I think I'll stick to my $300/(delivered MFLOP), after factoring in 
historical knowledge on the performance of compilers and algorithms.

>
>BTW, the Electronic Engineering Times article I mentioned above was from
>the 5/22/95 issue if you're interested.

Thanks for the reference.

>
>David Golombek
>MIT EE/CS student

Russell Carter
Geli Engineering: Distributed Computing Solutions/Pentium Workstation Clusters
http://www.geli.com

