Newsgroups: comp.parallel
From: Cruz <cruz@blkbox.com>
Subject: question about multi issue instructions
Organization: The Black Box, Houston, Tx (713) 480-2686 
Date: Thu, 10 Aug 1995 17:04:57 GMT
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Message-ID: <40de7p$bko@news.blkbox.com>

How does a parallel system split the data stream so that more than one
chip can work on the problem?  Is this similar to how a microprocessor, 
like the SuperSPARC or the Alpha AXP 21164A, can have a 4 way instruction 
issue?  



