Newsgroups: comp.parallel
From: gottlieb@allan.ultra.nyu.edu (Allan Gottlieb)
Subject: Re: question to mp system designers-researchers
Organization: New York University, Ultracomputer project
Date: 31 Mar 1995 18:45:05 GMT
Message-ID: <3lrkfa$alu@usenet.srv.cis.pitt.edu>

In article <3kpt2e$l92@usenet.srv.cis.pitt.edu> "( " <zahir@senan.eng.sun.com> writes:

   Hi, what are some of the first order wish list of features
   that system architects designing MP systems using off the shelf
   commercial RISC processors from SPARC/MIPS/PowerPC/Alpha/Intel
   would like to see integrated in these processors for better
   scalable/efficient/cost-effective/realtime/latency-hiding/etc
   future mp support?

I would like to see fetch-and-add (or at least fetch-and-increment AND
fetch-and-decrement), but I admit to being biased.

--
Allan Gottlieb                  gottlieb@nyu.edu
New York University             http://cs.nyu.edu/cs/faculty/gottlieb/

