Newsgroups: comp.parallel.mpi
From: jeremy@jeremy.Hi.COM (Jeremy Nussbaum)
Subject: mpi, ad2, mach ipc
Organization: "Hitachi Computer Products (America), Inc.
Date: 25 Apr 1996 18:47:08 GMT
Message-ID: <4lohbd$he3@sunfish.hi.com>

Is there an implementation of mpi which uses mach ipc as the underlying
message passing facility?  I am starting to do some parallel benchmarking
on some ad2 systems, and would like to bring up an implementation of
mpi and pvm to start working with.  The ad2 systems (osf1.3 like, no
shared memory multiprocessor) have different types of interconnects, run
as a single system image and have no shared memory.  User level internodal
communication is in general via mach ipc.  I realize the major
parallel cpu systems have special hardware and user level interfaces
for efficiency in internodal communication, but I don't yet have
access to such an implementation.  The implementations that I've seen
in e.g. mpich are socket based tcp/ip for clusters of ws's, shared
memory for smp's, and system specific for norma parallel processor.
Any info, including partial implementations or work in progress,
will be appreciated.

tia,
-- 
Jeremy Nussbaum (jeremy@hi.com)


