Newsgroups: comp.parallel.mpi
From: george@holmes.cs.nps.navy.mil (Robert George)
Subject: Re: SGI MIPCH Question
Organization: Naval Postgraduate School, Monterey
Date: Mon, 11 Sep 1995 22:40:25 GMT
Message-ID: <DErIzD.7GH@taurus.cs.nps.navy.mil>

Steve,

     I'm sure the MPICH crew will answer this question in greater detail, but
the bottom line is that MPICH will only operate with 1 transport layer at a
time.  It would be difficult/inefficient to poll in two places for incomming
message traffic.

     So you can either use the P4 transport layer (ch_p4), *or* the shared memory
transport layer (ch_shmem), but not both.

___________________________________________________________________________
Robert George      Computer Engineer     (408) 656-3316 Fax: (408) 656-2814
Army Research Laboratory/AMSRL-SS-IC/2800 Powder Mill Rd/Adelphi, MD 20783
            URL: http://cs.nps.navy.mil/people/phd/george
"That is really incredible. That is truly incredible.  That is so incredibly
 incredible that I think I'd like to steal it.    --Zaphod Beeblebrox" 

