Newsgroups: comp.os.parix
From: pimentel@fwi.uva.nl (Andy Pimentel)
Subject: Re: fat tree topology of GC/PowerPlus-64
Organization: FWI, University of Amsterdam
Date: 23 Jun 1994 09:21:15 GMT
Message-ID: <2ubk6b$f98@mail.fwi.uva.nl>

schumanm@Informatik.TU-Muenchen.DE (Matthias Schumann) writes:

>Hi there,

>I have just gone through a Parystec advertising paper and found the following 
>description of the GC/PowerPlus-64 system configuration:

>32 nodes with 2 processors per node and a total memory of 2 GB
>4x8 "Fat Grid" topology

>I know about the "Fat Tree" topology, but I have never heard of a "Fat Grid"
>topology. OK, it's not PARIX-OS related, but maybe anyone out there can give 
>a hint on "Fat Grids" ?!

It is called a fat grid because nodes are connected with each other by
multiple communication links (instead of one). E.g., when there are
four T805's sitting on a node, there are 4 comm. links in each direction
(making a total of 16 comm. links).

>And a PARIX related topic: the PowerPlus architectures use a PowerPC as
>application processor and a transputer as message processor. If there is 
>a message arriving for the PowerPC the transputer has to notify the 
>PowerPC and vice versa the PowerPC has to notify the transputer when
>there is a send request. Thus, I am interested how this is implemented 
>within PARIX. Are interrupts used, do the processors poll on semaphores
>(what should be crucial to performance since the transputer has no cache
>and therefore there is no common cache consitency protocol to implement cached
>semaphores), or does PARIX check for message traffic during the clock-tick 
>interrupt ?

As far as I know, a T805 can interrupt a PPC and vice versa.

/Andy
-- 
Andy Pimentel                  X       #define R(x,y) (x<<y|(x<<y&32)>>5)&31
Dept. of Computer Science     |X|      main(i){putchar(i+64);if(~i&16)if(~0\
University of Amsterdam       `-'      +i&&~3+i)main(R((~i&15),2));else mai\
Email: pimentel@fwi.uva.nl     X       n(R((i|i<<1|i<<2),1));else puts("");}

